From bd89df5f5a4793676abc5da2e97e6ed7217ca166 Mon Sep 17 00:00:00 2001 From: Jota <139649225+jotitadev@users.noreply.github.com> Date: Mon, 19 Oct 2026 02:45:51 +0000 Subject: [PATCH] test(agc): name the host stage in the unit shadow tests' host-write barriers The retile and key-store helpers order the host's pattern writes before their transfer with VK_ACCESS_HOST_WRITE_BIT under VK_PIPELINE_STAGE_ALL_COMMANDS_BIT alone, which does not include the host stage (VUID-vkCmdPipelineBarrier-srcAccessMask-02815). They now name VK_PIPELINE_STAGE_HOST_BIT as UnitShadow.cpp does for the same barrier. --- core/libs/prx/libSceAgcDriver/tests/Recorder.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/core/libs/prx/libSceAgcDriver/tests/Recorder.cpp b/core/libs/prx/libSceAgcDriver/tests/Recorder.cpp index 65f350d63b..aac23cec09 100644 --- a/core/libs/prx/libSceAgcDriver/tests/Recorder.cpp +++ b/core/libs/prx/libSceAgcDriver/tests/Recorder.cpp @@ -4023,7 +4023,7 @@ bool unitShadowTests(const Device& device, Recorder& recorder) { const auto commands = recorder.Commands(); recorder.Keep(pattern); recorder.Keep(destination.slab); - RecordMemoryBarrier(context, commands, VK_PIPELINE_STAGE_ALL_COMMANDS_BIT, VK_PIPELINE_STAGE_TRANSFER_BIT, VK_ACCESS_HOST_WRITE_BIT | VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_TRANSFER_READ_BIT | VK_ACCESS_TRANSFER_WRITE_BIT); + RecordMemoryBarrier(context, commands, VK_PIPELINE_STAGE_ALL_COMMANDS_BIT | VK_PIPELINE_STAGE_HOST_BIT, VK_PIPELINE_STAGE_TRANSFER_BIT, VK_ACCESS_HOST_WRITE_BIT | VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_TRANSFER_READ_BIT | VK_ACCESS_TRANSFER_WRITE_BIT); if (seed) { const VkBufferCopy seedCopy{begin - import->base, SlabOffset(*import, *destination.slab, begin), unit}; copyBuffer(commands, import->buffer, destination.buffer, 1, &seedCopy); @@ -6469,7 +6469,7 @@ bool shadowedKeyStoreTests(const Device& device, Recorder& recorder) { const auto commands = recorder.Commands(); recorder.Keep(pattern); recorder.Keep(destination->slab); - RecordMemoryBarrier(context, commands, VK_PIPELINE_STAGE_ALL_COMMANDS_BIT, VK_PIPELINE_STAGE_TRANSFER_BIT, VK_ACCESS_HOST_WRITE_BIT | VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_TRANSFER_READ_BIT | VK_ACCESS_TRANSFER_WRITE_BIT); + RecordMemoryBarrier(context, commands, VK_PIPELINE_STAGE_ALL_COMMANDS_BIT | VK_PIPELINE_STAGE_HOST_BIT, VK_PIPELINE_STAGE_TRANSFER_BIT, VK_ACCESS_HOST_WRITE_BIT | VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_TRANSFER_READ_BIT | VK_ACCESS_TRANSFER_WRITE_BIT); const VkBufferCopy piece{0, destination->offset, unit}; copyBuffer(commands, pattern->Handle(), destination->buffer, 1, &piece); RecordMemoryBarrier(context, commands, VK_PIPELINE_STAGE_TRANSFER_BIT, VK_PIPELINE_STAGE_ALL_COMMANDS_BIT, VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_TRANSFER_READ_BIT | VK_ACCESS_TRANSFER_WRITE_BIT);