Commit Graph
186 Commits
Author SHA1 Message Date
Adrià 6b6ea36f05 Merge pull request #15122 from MarcZX10/docs/topa-core-docs
docs: correct the CMake minimum version and the f32 flush probe location
2026-11-07 00:34:18 +01:00
Adrià 07fae3d172 Merge pull request #11351 from tibzejoker/perf/f16-convert-probe
perf(shader): keep native f16 conversion NaN results when a startup probe matches RDNA
2026-11-06 12:50:38 +01:00
Dean 3a2cd3df9e Merge pull request #14264 from Astronaut10/feat/libs-linux-mimalloc
feat(libs): let relinked Linux games opt into mimalloc
2026-11-06 14:12:09 +13:00
Dean Galvin 4492567a14 Merge branch 'main' 2026-11-06 13:07:38 +13:00
Dean GalvinandMarcZX10 3b49c32956 docs(architecture): refer to the cache format by its constant
The shader cache paragraph named a format number that did not match
ShaderDiskCache::FormatVersion (48 against 56 on this branch). Name the
constant instead of repeating its value, so the text cannot go stale
when the version moves. The rejection of other formats and of other
compiler source versions is unchanged.

Apply review request from 2026-11-06.

Co-authored-by: MarcZX10 <[email protected]>
2026-11-06 13:02:47 +13:00
MarcZX10 bbffa36a2e docs(architecture): name the current shader cache format version
ShaderDiskCache.hpp is at FormatVersion 48; the stencil-reference and push-data entries described there are still stored.
2026-11-05 21:27:30 +00:00
MarcZX10 86e2ed26a6 docs(architecture): describe the storage image table binding 2026-11-05 21:27:02 +00:00
MarcZX10 fe85428ee0 docs(architecture): count the async log end modes per platform 2026-11-05 21:27:02 +00:00
MarcZX10 36fc3cfc27 docs(architecture): say that Driver::stop runs the bounded log flush 2026-11-05 21:27:02 +00:00
MarcZX10 ed8e4b5598 docs(architecture): describe deferred registration preparation failures 2026-11-05 21:27:02 +00:00
MarcZX10 a31e8f4f87 docs(architecture): say that the registration preparation pool is joined 2026-11-05 21:27:02 +00:00
MarcZX10 360cc25d8f docs(architecture): update the shader disk cache format 2026-11-05 21:27:02 +00:00
MarcZX10 0b129ba5cf docs(architecture): list the red-zone sites game patches are checked against 2026-11-05 21:27:02 +00:00
MarcZX10 6530f4222e docs(architecture): point the conversion steps at Conversion::Convert 2026-11-05 21:27:02 +00:00
MarcZX10 3436d087dc docs(architecture): list what the shader mode register test covers 2026-11-05 21:27:01 +00:00
MarcZX10 9dfc67be73 docs(architecture): list the instructions that follow a run-time rounding mode 2026-11-05 21:27:01 +00:00
MarcZX10 2521cbfa19 docs(architecture): say when MODE writes throw 2026-11-05 21:27:01 +00:00
MarcZX10 93f70dcb68 docs(architecture): describe s_round_mode as a rounding write 2026-11-05 21:27:01 +00:00
MarcZX10 8307322159 docs(architecture): describe immediate MODE rounding writes and their propagation 2026-11-05 21:27:01 +00:00
MarcZX10 1a5e14171e docs(architecture): describe s_getreg_b32 reads of the tracked rounding bits 2026-11-05 21:27:01 +00:00
MarcZX10 5d99a1cce4 docs(architecture): say which resource plan conditions take both successors 2026-11-05 21:27:01 +00:00
MarcZX10 3012dae4dc docs(architecture): name MayDecide as the check that keeps a resource plan condition 2026-11-05 21:27:01 +00:00
MarcZX10 9d38f65706 docs(architecture): list every collect epoch bump point 2026-11-05 21:27:01 +00:00
MarcZX10 755965a512 docs(architecture): describe the Windows write-watch hint in the untracked compare stamp 2026-11-05 21:27:01 +00:00
MarcZX10 14be45f9d1 docs(architecture): note that scoped layer-range comparisons are memoized too 2026-11-05 21:27:01 +00:00
Dean 020377bf9b Merge pull request #14265 from Astronaut10/perf/shader-vertex-specialized
perf(shader): emit vertex modules specialized instead of in registration form
2026-11-05 08:18:17 +13:00
AdriàandClaude Sonnet 5.5 6740167447 docs(shader): name serialization version 54 for the f16 conversion NaN fields
Co-Authored-By: Claude Sonnet 5.5 <[email protected]>
2026-11-04 19:27:02 +01:00
thibautandClaude Opus 5.5 81b6f2822b feat(shader): save the f16 conversion NaN fields in recompile requests
SpirvTarget::float16WidenNans and float16NarrowNans shape the emitted
SPIR-V, but the request serializer did not write them, so a request saved
on a device whose probe matched replayed with the emulated NaN rebuild.
Format version 54 writes both flags after the shader image minimum LOD flag;
versions 53 and older read them as false. agc_shader_replay's --f16-widen-nans
and --f16-narrow-nans still force them on.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
Claude-Session: https://claude.ai/code/session_01PHJtpJ4hw3KWJhobipK8ia
2026-11-04 19:26:55 +01:00
thibautandClaude Opus 5.5 a7bfef8f59 perf(shader): keep native f16 conversion NaN results when a startup probe matches RDNA
Native OpFConvert and UnpackHalf2x16 round and handle denormals as RDNA does
under RoundingModeRTE and DenormPreserve 16, but Vulkan leaves the NaN they
return to the driver, so every conversion rebuilds RDNA's NaN with integer
selects (about 55 words per f32 to f16 conversion, 29 per f16 to f32).

ProbeFloat16Conversions runs when the device is created: v_cvt_f32_f16 over
all 65,536 halves and v_cvt_f16_f32, v_cvt_pkrtz_f16_f32 and a round trip
over every NaN payload class, signalling NaNs, denormals, ties and overflow,
under four float modes, each compiled with the rebuilt NaN and with the
native result, inputs read from a buffer. SpirvTarget::float16WidenNans and
float16NarrowNans are set per direction only when every result matches; both
are in the recompile cache key. APS5_NO_NATIVE_F16_NANS skips the probe.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
Claude-Session: https://claude.ai/code/session_01PHJtpJ4hw3KWJhobipK8ia
2026-11-04 19:26:25 +01:00
MarcZX10 f600b68652 docs(architecture): correct the location of the f32 flush probe programs
Old wording: "the three programs of `agc_driver_f32_denormal_flush`".
New wording: "the three programs in FloatFlushProbe.cpp", linked to the file.

Evidence: core/libs/prx/libSceAgcDriver/Execution/src/FloatFlushProbe.cpp:172
defines the programs (MixedCode, TinyCode, MixedTinyCode). No test or target named
agc_driver_f32_denormal_flush exists on upstream/main (git grep finds only
agc_denormal_flush_elimination_tests, which tests DenormalFlushEliminator).
2026-11-04 11:35:13 +00:00
Dean 6aca873d9b Merge pull request #15454 from Nesyth/perf/agc-import-kind-windows
perf(agc): import a block that mixes private memory with shared views in smaller runs
2026-11-04 21:31:42 +13:00
Cesar MoraandClaude Opus 5.5 468c07712c feat(libs): let relinked Linux games opt into mimalloc
With APS5_MIMALLOC set, libkernel restarts the title with
libmimalloc.so from libs/ first in LD_PRELOAD, as it does on macOS
with DYLD_INSERT_LIBRARIES. The macOS restart becomes one
implementation with platform pieces (MimallocRestart.cpp): on Linux
the executable is the target of /proc/self/exe and the arguments
those of /proc/self/cmdline. The restart is a priority 101
constructor, so it runs before libkernel's other initializers. It
gives the standard streams back from an ANYPS5_LOG_FILE copy before
execv, which also fixes the macOS restart under that variable, and
refuses a path the preload list cannot hold.

The build copies libmimalloc.so beside the libraries except in ASan
and TSan builds, the Linux release archives ship it, and the restart
tests run on Linux too, with a new case for ANYPS5_LOG_FILE.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
Claude-Session: https://claude.ai/code/session_015W3M6NbYpmwWkzkL8YNLaF
2026-11-03 23:18:20 -06:00
Nesyth 8490638cc3 perf(agc): import a block that mixes private memory with shared views in smaller runs 2026-11-03 10:18:57 +01:00
Cesar MoraandClaude Opus 5.5 94fae013aa perf(shader): emit vertex modules specialized instead of in registration form
In registration form a vertex module decodes the V# stride, swizzle,
bounds mode and format of every vertex buffer load at run time. Vertex
artifacts are now emitted specialized, as one above
registrationWordLimit already was; pixel artifacts keep registration
form. A vertex stage's pre-rasterization library is built at its first
draw instead of at registration.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
Claude-Session: https://claude.ai/code/session_015W3M6NbYpmwWkzkL8YNLaF
2026-11-02 12:44:12 -06:00
Giuseppe Magliano 2359fe01bf fix(agc): probe DenormPreserve 32 before requesting it
Since #8697 every device with shaderDenormPreserveFloat32 and an independent
f32 denormal behaviour gets DenormPreserve 32. RADV on Vega (GCN 5, Mesa
26.0.8) miscompiles the preserving forms of the transcendental ops: its
v_log_f32 lowering picks the denormal scale with a v_cndmask_b32 that reads
two SGPRs, which GFX9 cannot do, so log2(2.0) is 25.0 in some lanes and
agc_driver_log_near_one, vop1_float_unary, fp16_overflow and
float16_result_modifiers fail.

ProbeFloat32DenormPreserve runs v_log_f32, v_sqrt_f32, v_rsq_f32, v_rcp_f32
and v_exp_f32 on normal values with and without the mode, after the flush
probe. The mode only changes denormal handling, but Vulkan does not require
these ops to be correctly rounded, so Float32ResultsAgree accepts each of
the 256 result pairs when they are no further apart than the width of the
interval the Vulkan precision bound allows around the exact result (sqrt's
bound inherited from 1.0 / inversesqrt(), an absolute 2^-21 for log2 inputs
in [0.5, 2.0]). When one falls outside, float32DenormPreserve
stays off and the device keeps its default f32 denormal handling.
2026-11-02 14:39:32 +01:00
Dean Galvin d6f1eccfe2 revert(agc): keep driver pipeline caches and costly compute pipeline binaries across updates (#13931)
This reverts commit d8b60b46ed, reversing
changes made to d94fad17de.
2026-11-02 08:24:24 +13:00
Adrià ad8567f5af docs(agc): describe the driver cache directory and the pipeline binary store; fix pipeline binary skip messages 2026-11-01 11:56:39 +01:00
MarcZX10 90373c8136 docs(architecture): link the host import budget entry to its library debt file
Old claim: the live-imports paragraph in the Graphics section pointed to
"TechnicalDebt, Host import windows and budget". That entry is not on the
TechnicalDebt page.

What the code does: the entry sits in the libSceAgcDriver debt file as a
bullet (not a heading), and TechnicalDebt.md says library entries belong in
docs/dev/debt/, so the reference now names that file.

Permalinks at audited SHA b1b5353cfc:
- https://github.com/boykopovar/AnyPS5/blob/b1b5353cfcee098ed17e3ba8a6e616bee97c9215/docs/dev/debt/libSceAgcDriver.md#L278
- https://github.com/boykopovar/AnyPS5/blob/b1b5353cfcee098ed17e3ba8a6e616bee97c9215/docs/dev/TechnicalDebt.md#L3
2026-10-30 14:19:49 +00:00
Adrià 712fc0e924 Merge pull request #12378 from BunnyFl/perf/write-watch-page-exclusion
perf(agc): exclude only an import's own pages from the write watch and settle partial-block imports in the background
2026-10-30 06:54:29 +01:00
Adrià 84e114e4eb Merge pull request #12715 from MarcZX10/feat/log-to-file
feat(libc): copy the runtime log into a file with ANYPS5_LOG_FILE
2026-10-30 05:51:34 +01:00
BunnyFlandClaude Opus 5.5 480ca2dff1 Merge branch 'main' into perf/write-watch-page-exclusion
Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-29 15:18:47 +01:00
Adrià 5454cd2e45 Merge pull request #11130 from imellag/perf/macos-mimalloc
feat(libs): let relinked macOS games opt into mimalloc
2026-10-29 12:58:23 +01:00
Adrià edf6804cf5 Merge pull request #12743 from XairRrR/docs-architecture-whole-pipelines
docs(architecture): list every case that builds a draw pipeline whole
2026-10-29 07:49:19 +01:00
XairRrR 522b8dc76f docs(architecture): list every case that builds a draw pipeline whole
The pipeline library paragraph listed per-face depth bias, split alternate
alpha blends, rect lists, geometry shaders and a stage without a variant id
as the pipelines created whole. libraryKeys in Pipeline.cpp also builds a
pipeline whole for barycentrics emulated through generated tessellation
stages, for tessellation on MoltenVK, for a pixel shader with a fragment
shader interlock or with its LDS array in a storage buffer, and for every
pipeline under APS5_PIPELINE_STATS=1, and it tests a stage's
RecompileResult::Identity rather than a variant id. The paragraph now lists
these cases and names libraryKeys.

AI-assisted: yes
2026-10-29 07:37:46 +01:00
AdriàandClaude Sonnet 5.5 fbc3d2ef56 docs(architecture): describe the ANYPS5_LOG_FILE copy of the runtime log
Co-Authored-By: Claude Sonnet 5.5 <[email protected]>
2026-10-29 05:57:24 +01:00
JJenkxandClaude Opus 5.5 1c15869a4e docs: limit the bundled-module rule to imports that name the library
Follows oneandonlydean's review: on Windows a converted app0 module is
put ahead of the host library only for imports that name its library,
so a bundled module serves those imports, not every NID it exports.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-28 23:30:19 -04:00
JJenkxandClaude Opus 5.5 77642c6a26 docs: scope the module search order and its libSceLibcInternal exception
Follows rooklz's review. The bullet now covers Windows and Linux only,
says the Windows stub looks up by symbol name before NID, and states
that Windows searches the host libSceLibcInternal.prx and libc.prx
before the bundled libc.prx for libSceLibcInternal imports, skipping
its exports that only return zero.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-28 23:18:11 -04:00
JJenkxandClaude Opus 5.5 54a437655c docs: state that bundled modules are searched before the host libraries
An import binds to the first module that exports its NID. The Windows
entry stub searches converted app0 modules before libs, and on Linux the
guest modules loaded at startup come before the host libraries in
DT_NEEDED. A title that ships libc.prx therefore runs its own libc for
the NIDs that module exports.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-28 22:52:57 -04:00
BunnyFlandClaude Opus 5.5 a3f6a014fa perf(agc): exclude only an import's own pages from the write watch and settle partial-block imports in the background
Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-29 01:06:09 +01:00
Emanuele 4c75091972 feat(libs): let relinked macOS games opt into mimalloc 2026-10-28 14:50:31 +01:00