tools/hw-oracle measures RDNA instructions on a local AMD GPU, but
nothing ran the same kernel through the shader recompiler, so a
difference between the recompiler and the hardware could only be found
by hand. agc_oracle_runner takes the HSA code object the oracle
assembles from template.s, reads its text and kernel descriptor (wave
size, LDS, FLOAT_MODE, DX10_CLAMP, IEEE and FP16_OVFL), refuses every
other kernel ABI, and dispatches it through the recompiler on the
Vulkan device with the oracle binary's argument convention. The new
hw_oracle.py runtime, HW_ORACLE_RUNTIME=vulkan, assembles as before and
dispatches through that runner, so one body and one set of rows run on
both sides and their JSON reports compare with compare_results.py.
Co-Authored-By: Claude Fable 5.1 <[email protected]>
HW_ORACLE.md said the first run builds oracle.c into
~/.cache/anyps5-hw-oracle/. hw_oracle.py takes the cache root from
XDG_CACHE_HOME and falls back to ~/.cache only when that variable is unset
or empty, so with XDG_CACHE_HOME=/tmp/xdg the binary is built under
/tmp/xdg/anyps5-hw-oracle/ and nothing appears in ~/.cache. The document
now names XDG_CACHE_HOME, the ~/.cache fallback, and HW_ORACLE_CACHE as
the override of both.
AI-assisted: yes
The measured rows go into core/libs/prx/libSceAgcDriver/tests/execution/,
the only tests/execution directory in the tree; the guide named only
tests/execution/.
oracle_hip.py tries amdhip64_7, amdhip64_6 and amdhip64, and amd_comgr_3,
amd_comgr_2 and amd_comgr, newest first; the guide named only the older
ones.
tools/hw-oracle needed Linux with ROCm, so Windows measurements went
through private runners. oracle_hip.py assembles and links template.s
kernels with the driver's amd_comgr and dispatches them with its HIP
runtime, with the same rows, padding, dispatch splitting and report as
oracle.c. hw_oracle.py selects it with HW_ORACLE_RUNTIME, by default on
Windows, and loads it in-process so the DLLs are loaded once per run.
The driver's comgr 2.9 numbers its assemble and link actions 0x8 and
0x7, not 0xA and 0x9, so each step tries both and keeps the one that
returns exactly one output of the expected kind.
Co-Authored-By: Claude Opus 5.5 <[email protected]>
With FP16_OVFL=1 the hardware writes an f16 result that would round to
infinity as the largest finite value of that sign, unless a source
operand is infinite. v_div_fixup_f16 keeps the infinity it writes for a
zero denominator or an infinite numerator. Measured on RDNA2 (gfx1036)
at IEEE=0 and IEEE=1 with f16 denormals kept and flushed.
Co-Authored-By: Claude Fable 5.1 <[email protected]>
The template allocated a fixed 4 KiB of LDS, so kernels with immediate
offsets past it could not run. --lds (Python lds) sets the group segment
size in bytes, up to 64 KiB, with 4096 as the default.
Co-Authored-By: Claude Fable 5.1 <[email protected]>
BREAKING CHANGE: CLI and Python callers must supply all seven float
controls. Add clamp, rounding and FP16 overflow settings so hardware
measurements cannot silently use an unintended mode.
Refs #981
