Commit Graph
391 Commits
Author SHA1 Message Date
Adrià edabe9efa1 Merge pull request #11255 from Michael-KD/docs/vcc-descriptor-tuples-measured
docs(shader): record the VCC descriptor tuples measured on RDNA2
2026-10-27 08:28:15 +01:00
Adrià 42317c7f32 Merge pull request #11256 from Michael-KD/docs/array-comparison-through-2d-measured
docs(shader): record 2D-array comparison samples measured on RDNA2
2026-10-27 08:27:36 +01:00
Dean a453b29ebe Merge pull request #11434 from LeandroLP23/test/shader-cache-smb-posix-rename
test(shader): skip open-entry cache replacements where SMB has no POSIX rename
2026-10-27 18:38:46 +13:00
Dean d471a12b82 Merge pull request #11112 from Bram910/fix/shader-skip-unreachable-words
fix(shader): skip undecodable words that only follow s_branch or s_endpgm
2026-10-27 15:00:43 +13:00
Dean 37c6b4bc25 Merge pull request #8077 from 0xcrstn/ufc6/descriptor-web-fold
fix(shader): split descriptor webs whose paths fold or hold invalid arms
2026-10-27 14:56:47 +13:00
Dean d1de04f943 Merge pull request #7484 from AlxcBTW/pr/robust-loads
perf(recompiler): leave the descriptor-range comparison out of direct buffer loads when the device zeroes past the range
2026-10-27 14:56:32 +13:00
Dean 630211a866 Merge pull request #6612 from milescoviello/feat/tess-geometry
feat(agc): draw tessellation followed by an NGG geometry stage
2026-10-27 14:56:18 +13:00
Michael Krumland-DunningandClaude Opus 5.5 854be22d20 docs(shader): extend the 2D-array comparison measurement to every compare function
The 2D-array comparison results were measured with LESSEQUAL only. A
second gfx1036 run over all eight DEPTH_COMPARE_FUNC values (128
kernels) gives the same: a 2D-array address on a 2D T# ignores the
slice, and codes 1 and 56 return 0 under every function. Both entries
now say so.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-26 10:18:36 -07:00
Michael Krumland-DunningandClaude Opus 5.5 39f6f45487 docs(shader): record 2D-array comparison samples measured on RDNA2
A comparison or plain sample with a 2D-array address on a 2D T#
returns what the same sample with a 2D address returns, whatever the
slice, as measured with the hardware oracle on RDNA2 (gfx1036) for
formats 1, 7, 22 and 56 with point and bilinear filtering, while a
four-layer 2D-array T# over the same memory returns a different result
per slice. Codes 1 and 56 also compare to 0 with 2D-array addresses.
The three comparison debt entries keep gfx1013, cube comparisons and
the other formats' array comparisons as open.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-26 10:18:36 -07:00
Michael Krumland-DunningandClaude Opus 5.5 9c9c33821f docs(shader): record the VCC descriptor tuples measured on RDNA2
Buffer resources and MIMG samplers at register field 26 read s104,
s105, vcc_lo and vcc_hi, as measured with the hardware oracle on RDNA2
(gfx1036) in wave32 and wave64 with raw encodings, which LLVM's
assembler refuses. Loads, format conversion, bounds and stores through
the buffer tuple, and sampling through the sampler tuple, act as the
same words in ordinary SGPRs do, and a change to each of the four
words shows in the result. Both debt entries now keep gfx1013 as open.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-26 10:18:35 -07:00
LeandroLP23andClaude Opus 5.5 b95b22cf16 test(shader): skip open-entry cache replacements where SMB has no POSIX rename
On Windows, WriteFileAtomically replaces a cache entry with a POSIX
rename so that readers and mappings of the old entry keep working.
Through an SMB share that rename fails with ERROR_INVALID_PARAMETER, and
the plain rename it falls back to is refused while the destination is
open or mapped, so agc_shader_disk_cache and shader_cache_file_read
failed with their temporary directory on such a share (#10833).

The POSIX rename moves into PosixReplaceByHandle, unchanged, and
PosixReplaceUnsupported probes it in a directory. Where it reports that
error, the tests skip only the replacements of an entry that a reader
holds open or the cache has mapped, and the disk cache test's cleanup
leaves its directory behind when the POSIX delete fails the same way;
any other failure still fails them. shader_cache_file_read also builds
its \?\ alias of a UNC path as \?\UNC\server\share. The limitation is
recorded in the shader debt file.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-26 16:45:38 +01:00
0xcrstnandClaude Opus 5.5 ec06ba2973 fix(agc): read back descriptor faults of shaders that also use image tables
A shader with an image table map read its fault buffer back only when a
table record was poisoned, an SRT read was poisoned, it had window lane
guards or the loop guard was on. A DescriptorFault only set the fault
buffer, so with a valid table and no copied write nothing ran the fault
check, and a lane that took a folded descriptor web path or selected an
undefined arm read arm 0 or zeros with no report.

The compiled artifact now counts its DescriptorFault instructions
(descriptorFaults, stored in the shader disk cache, format 48), and the
readback gate requests the fault check when it is nonzero. The result a
capture materializes copies the count, and also windowLaneGuards, which
that copy had dropped, so the gate's window lane guard condition never
saw it. sizeof(CompiledShaderArtifact) is 288 and sizeof(RecompileResult)
552 with the new field.

agc_driver_descriptor_web_faults adds a wave32 shader that reads an image
table and then the descriptor web, storing only to LDS so no copied write
forces completion: it binds an image table and no BDA address table, a
valid arm and an unselected undefined arm stay clean, the folded path and
a selected undefined arm fault at the read, and nothing faults with EXEC
empty. Without the gate change the folded case does not fault.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-26 14:46:11 +02:00
0xcrstnandClaude Opus 5.5 ac0c125999 Merge upstream main into ufc6/descriptor-web-fold
Resolve the overlap with main's WindowLaneGuard and image-resource changes
by keeping both sides: DescriptorFault sits next to WindowLaneGuard in the
opcode list, metadata and side-effect switch, and its emitter next to
EmitWindowLaneGuard; optionalDescriptor is serialized after
remappedDepth1D; undefinedImageWords follows the new image helpers; the
descriptor web debt entry follows main's new entries.

The ImageResource field-count assertion is derived from the merged
structure (44 fields: main's 43 plus optionalDescriptor). sizeof
(ImageResource) stays 96 and sizeof(MemoryInfo) stays 80, so those
assertions are unchanged. The undefined-format test keeps its captured
regions in a variable, as MemoryRegionView no longer binds a temporary.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-26 14:10:30 +02:00
Dean Galvin e0bd61fae2 Merge branch 'main' into pr/robust-loads 2026-10-26 23:10:10 +13:00
Bram910andClaude Opus 5.5 cece0ab167 fix(shader): report a skipped word's error on every decode exit
A branch into a skipped word was only reported when the sweep ended at
s_endpgm or s_code_end; a sweep that ran to the end of the code threw
the generic code-boundary error instead. Only the decoder's error types
are skipped now, so other exceptions propagate, and the debt entry
records the exception per skipped word and what a misaligned sweep
through an unreachable span puts in the program.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-26 11:08:51 +01:00
Bram910 433aa1dac9 Merge origin/main into fix/shader-skip-unreachable-words 2026-10-26 10:57:34 +01:00
Dean d9f5bf4d91 Merge pull request #11120 from shahulmubeen-a/fix/shader-1d-store-through-2d-array
fix(shader): write 1D storage images through 2D-array stores at slice 0
2026-10-26 21:58:24 +13:00
Dean 701616674a Merge pull request #10708 from Michael-KD/test/sdwa-cvt-f32-ubyte-measured
test(shader): pin SDWA v_cvt_f32_ubyte source selects measured on RDNA2
2026-10-26 11:10:38 +13:00
Bram910andClaude Opus 5.5 df5555a905 docs(shader): move the unreachable-words debt entry next to the control-flow entries
Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-25 19:40:23 +01:00
Shahul Mubeen AandClaude Opus 5.5 b9d00c5d80 fix(shader): write 1D storage images through 2D-array stores at slice 0
An image_store with DIM 2D_ARRAY through a 1D T# had no runtime image
mode, so the dispatch stopped with "image descriptor is incompatible
with the static runtime image interface". #2348 added a 1D mode for
DIM 2D stores only.

Write-only 2D-array storage images now get the same 1D mode as the 2D
case. On RDNA2 (gfx1036, hardware oracle) such a store writes texel x
and ignores y when the slice is 0, and writes nothing for any other
slice, with DEPTH 0 or 3, so the store is skipped unless the slice is 0.

New execution test agc_driver_image_store_line_through_plane_array.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-26 00:10:03 +05:30
Bram910andClaude Opus 5.5 e1213fd473 fix(shader): skip undecodable words that only follow s_branch or s_endpgm
The RDNA program decode sweeps linearly up to the last s_endpgm past the
furthest direct branch target, so it also decoded words that no path
reaches and threw on any it could not decode. A word directly after
s_branch, s_endpgm or s_code_end that fails to decode is now skipped;
the decode still throws that word's error when a direct branch or
s_call_b64 targets it, and a failure on a word reachable by fall-through
is unchanged. The control-flow graph starts the block after s_branch and
s_endpgm at the next decoded instruction instead of the next word.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-25 19:15:40 +01:00
Adrià e317f41d59 Merge pull request #10440 from SuarezPM/ai/atomic64-keyed-tables
feat(shader): support 64-bit image atomics through keyed image tables
2026-10-25 11:58:35 +01:00
Dean b91a6a60c5 Merge pull request #10595 from TechLevelZero/fix/f32-conversion-denormal-modes
fix(shader): translate f32 conversions in f32 denormal modes 1 and 2
2026-10-25 23:54:07 +13:00
Dean 10a41a0d50 Merge pull request #10612 from imellag/test/agc-skip-cull-distance-without-support
test(agc): skip cull distance cases on devices without shaderCullDistance
2026-10-25 21:52:25 +13:00
milescovielloandClaude Opus 5.5 cd5fc9e838 feat(agc): draw tessellation followed by an NGG geometry stage
Crimson Desert (PPSA25286) draws with VGT_SHADER_STAGES_EN 0x60212d:
local, hull, domain and NGG geometry stages, the hull halves merged in one
registered type-3 program, the domain and geometry halves in one type-2
program. The domain half runs as the tessellation evaluation stage and
captures each vertex's ESGS item, and a mesh shader runs the geometry half
on the captured items.

Registered type-3 merged hulls come from #6679; this adds 16-bit LDS
reads and writes in tessellation stages, which Crimson Desert's merged
hull uses.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-25 08:32:37 +00:00
Dean Galvin eb3dd54501 Merge main into pr/robust-loads 2026-10-25 12:15:18 +13:00
Adrià c8d34aa8f4 Merge pull request #6009 from zmeizy/claude/minmax-f32-denormal-modes
fix(shader): translate f32 min and max in f32 denormal modes 1 and 2
2026-10-24 22:13:03 +02:00
Michael Krumland-DunningandClaude Opus 5.5 952cc18efa test(shader): pin SDWA v_cvt_f32_ubyte source selects measured on RDNA2
v_cvt_f32_ubyte0 to v_cvt_f32_ubyte3 take byte N of source 0 after
SRC0_SEL and SRC0_SEXT select and extend it, as measured with the
hardware oracle on RDNA2 (gfx1036) for all seven source selects with
and without SRC0_SEXT. The test checked four combinations derived from
the ISA guide; it now checks every combination against the measured
results, and the debt entry keeps only what is not measured: gfx1013.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-24 11:26:19 -07:00
Adrià d0e7fe7beb Merge pull request #5941 from zmeizy/claude/mullit-f32-denormal-modes
fix(shader): translate v_mullit_f32 in f32 denormal modes 1 and 2
2026-10-24 19:36:11 +02:00
Adrià e7e99adcc4 Merge pull request #6010 from zmeizy/claude/add-mul-f32-denormal-modes
fix(shader): translate f32 add and multiply in f32 denormal modes 1 a…
2026-10-24 18:20:07 +02:00
TechLevelZeroandClaude Opus 5.5 753767f86a fix(shader): translate f32 conversions in f32 denormal modes 1 and 2
The f32 conversions that only flush their inputs follow bit 0 of the
FLOAT_MODE f32 denormal field, as the f32 compares do: mode 1 keeps
denormal inputs like mode 3 and mode 2 flushes them like mode 0.
v_cvt_pk_u8_f32 also follows a round mode set at run time.

Measured on RDNA2 (gfx1036) with the hardware oracle.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-24 16:23:33 +01:00
Adrià 522e32e3b6 Merge pull request #7550 from gjonn/fix/shader-resinfo-any-descriptor-dimension
fix(shader): answer image_get_resinfo on any T# dimension
2026-10-24 15:30:15 +02:00
Adrià 18e85391b4 Merge pull request #9746 from imellag/fix/shader-empty-loop-continue
fix(shader): route a loop's back edge through an empty continue block when its latch holds instructions
2026-10-24 14:53:54 +02:00
Emanuele 0a8503d73d docs(shader): end the clip and cull distance debt sentence before the cull distance note 2026-10-24 14:53:25 +02:00
Emanuele 2d35e00af2 test(agc): skip cull distance cases on devices without shaderCullDistance
The driver refuses a draw that enables a cull distance when the device
has no shaderCullDistance, and agc_driver_vertex_clip_cull_distances,
agc_driver_vertex_clip_cull_draw (with and without the draw key) and
agc_driver_vertex_user_data_tail ran their cull distance cases anyway,
so on MoltenVK all four failed at that refusal. They now skip only
those cases when the target lacks CapabilityCullDistance, as they
already skip the mesh case without VK_EXT_mesh_shader, and the shader
debt entry records the refusal.
2026-10-24 14:43:12 +02:00
Tripchipp f346a79f76 docs(debt): keep the TYPE=0 entry clear of the unnormalized S# line 2026-10-24 11:25:41 +02:00
Tripchipp a5c8c3249d docs(debt): link the TYPE=0 null image entry to the recompiler 2026-10-24 11:25:41 +02:00
Adrià 2af46e4bcf Merge pull request #8450 from thuanquang/docs/debt-converted-unorm-image-loads
docs(shader): remove the stale converted unorm image loads entry
2026-10-24 11:24:57 +02:00
Adrià feffbca83e Merge pull request #8425 from thuanquang/docs/debt-packed-ancillary-whole-word
docs(shader): say that the whole packed ancillary word carries the layer field too
2026-10-24 11:24:32 +02:00
Adrià 11d08593b6 Merge pull request #8410 from thuanquang/docs/debt-f32-compare-denormal-modes
docs(shader): say that the f32 compares do not throw in f32 denormal modes 1 and 2
2026-10-24 11:21:31 +02:00
Adrià 4007c64f1e Merge pull request #8406 from thuanquang/docs/debt-interp-f16-lavapipe
docs(shader): drop the stale lavapipe skip from the 16-bit interpolation entry
2026-10-24 11:19:46 +02:00
Adrià 51e17a78bc Merge pull request #8403 from thuanquang/docs/debt-unnormalized-sampler-uses
docs(shader): list the samples unnormalized S#s are accepted for
2026-10-24 11:19:24 +02:00
Adrià 2b2055fa4f Merge pull request #8281 from thuanquang/docs/f64-denormal-debt
docs(debt): correct stale f64 denormal and RSRC1 float mode statements
2026-10-24 11:06:19 +02:00
Adrià a228fd9548 Merge pull request #8276 from thuanquang/docs/volume-array-sample-debt
docs(shader): state the gap first for 2D-array samples through a 3D T#
2026-10-24 11:06:00 +02:00
Dean 34c97ca9d9 Merge pull request #9046 from mehmetbayoglu/fix/recompiler-cache-line-endings
fix(recompiler): hash shader cache sources with normalized line endings
2026-10-24 20:22:23 +13:00
thuanquangandClaude 46a13989b9 docs(shader): remove the stale converted unorm image loads entry
Co-Authored-By: Claude <[email protected]>
2026-10-24 13:03:22 +07:00
Adrià a5a2c946a3 Merge pull request #10396 from CrimsonMac/fix/lds-misaligned-atomic64-fault
fix(shader): fault on misaligned 64-bit LDS atomics under the workgroup lock
2026-10-24 07:33:30 +02:00
memob 776040e96d Merge remote-tracking branch 'origin/main' into fix/recompiler-cache-line-endings
# Conflicts:
#	core/shader/recompiler/ShaderCacheVersion.cmake
2026-10-24 00:02:21 -04:00
Adrià FranchandClaude Opus 5.5 7b4b9d9814 fix(shader): zero the resinfo layer count for DIMs without layers
image_get_resinfo returns 0 in its third component when the instruction's
DIM has no layers (1D, 2D, 2D MSAA) and the T# is not 3D, as measured on
RDNA 2 in #7550. Keep 1D-array T#s on their first layer and MSAA T#s
refused, and record the unmeasured forms in the shader debt file.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-24 04:21:06 +02:00
thuanquangandClaude 71f70d803f docs(shader): count bits 16-28 among the ancillary word bits that have a source
Co-Authored-By: Claude <[email protected]>
2026-10-24 08:27:20 +07:00