PPSA28997 (IL2CPP) calls sceLibcBacktraceGetBufferSize and
sceLibcBacktraceSelf. On Linux the host call stack is captured with
backtrace and each frame is resolved to its module and offset with
dladdr, then written as a linked list of frame records. The record
layout is inferred and listed in TechnicalDebt. Windows throws.
v_pk_add/mul/fma/fmac/min/max_f16 threw in f16 denormal modes 0-2. On
RDNA2 (gfx1031) bit 6 clear flushes each denormal input lane to a zero
of its sign, and bit 7 clear flushes an add result below 2^-14 and a
mul or fma result whose exact value rounded to 11 significant bits
with an unbounded exponent is below 2^-14, as the scalar forms do;
min/max flush only their inputs. Packed f16 still throws for f16
rounding other than nearest even.
Co-Authored-By: Claude Opus 5.5 <[email protected]>
On RDNA2 (gfx1031) f16/f64 denormal modes 0 and 2 flush the denominator
and numerator of v_div_fixup_f64 to a zero of the same sign and keep a
denormal quotient and result, as v_div_fixup_f32 does with the f32
field. The translation used them unflushed, so 0 / 2^-1074 gave 0
instead of the default NaN.
Co-Authored-By: Claude Opus 5.5 <[email protected]>
v_fma_mix_f32 used its f16 sources unflushed in every mode. On RDNA2
(gfx1031) f16 denormal modes 0 and 2 flush each f16 source to a zero
of its sign, whatever the f32 denormal field, so
v_fma_mix_f32 0, 0, 0x0001 (all f16) is 0 there instead of 2^-24.
Co-Authored-By: Claude Opus 5.5 <[email protected]>
Both cases printed that the image storage table exceeds its capacity. They need different fixes, so each now has its own message with the set, the element's index in the set and the capacity. The debt entry now says that the index counts every table element before it in the set.
Co-Authored-By: Claude Opus 5.5 <[email protected]>
The non-split descriptor set's pool now counts the storage table binding's
descriptors, as the split path already did. A table storage element whose
minimum LOD clamps above the level it addresses is rejected per element, as
the direct path refuses it, and the element is looked up as written so a depth
surface under it is retired. The registration test checks again that
image_store_mip, image_store_pck and image_atomic_add through a table stay
unsupported operations that fault on use.
Co-Authored-By: Claude Opus 5.5 <[email protected]>
v_fma_f16, v_fmac_f16, v_fmamk_f16 and v_fmaak_f16 ignored the
FLOAT_MODE f16 denormal field. On RDNA2 (gfx1031) at f16 round to
nearest even, bit 6 clear flushes every denormal input to a zero of its
sign, and bit 7 clear flushes the result when the exact product-sum
rounded to 11 significant bits with an unbounded exponent is below
2^-14, the rule v_mul_f16 already follows. The f16 FMA path now flushes
its inputs and its round-to-odd result in those modes; the magnitude
test is shared with float16Binary as flushTinyF16Value.
Co-Authored-By: Claude Opus 5.5 <[email protected]>
Both ignored the FLOAT_MODE f16 denormal field. On RDNA2 (gfx1031)
v_cvt_pkrtz_f16_f32 flushes each denormal half result to its signed zero
when bit 7 of FLOAT_MODE is clear, and v_pack_b32_f16 flushes each
denormal half input when bit 6 is clear. Modes that keep them and
shaders without a known float mode are translated as before.
Co-Authored-By: Claude Opus 5.5 <[email protected]>
On RDNA2 (gfx1031) f16 denormal modes 0 and 2 flush the denominator and
numerator of v_div_fixup_f16 to a zero of the same sign and keep a
denormal quotient and result, as v_div_fixup_f32 does with the f32
field. The translation used them unflushed in every mode, so 0x0001 / 0
gave +infinity instead of the default NaN.
Co-Authored-By: Claude Opus 5.5 <[email protected]>
v_cmp_X_f16 and v_cmpx_X_f16 compared denormal halves as their exact
values in every mode. On RDNA2 (gfx1031) f16 denormal modes 0 and 2
flush both inputs to a zero of the same sign first, so
v_cmp_eq_f16 0x0000, 0x0001 is true there. Both inputs now go through
flushF16InputValue; modes 1 and 3 and shaders without a known float
mode are translated as before.
Co-Authored-By: Claude Opus 5.5 <[email protected]>
On AMD's Windows driver 32.0.21045.5002 (RX 6700 XT), a product of two
values the driver knows fit in 16 bits, reduced to 16 bits and stored
with nothing else merged in, keeps all 32 bits of the product.
v_mul_lo_u16 and v_pk_mul_lo_u16 extracted 16-bit factors, so into a
register whose high half was zero they wrote 0xfffe0001 for
0xffff * 0xffff. A factor taken from the low half of its source is now
read as the low 24 bits of the register; the low 16 bits of the product
depend only on the low 16 bits of the factors.
Co-Authored-By: Claude Opus 5.5 <[email protected]>
Keep both sides in GuestSysmodule.cpp (the unknown id check and the Windows
unwind region checks) and in libSceSysmodule.md (Silent stubs and Functional).
Co-Authored-By: Claude Sonnet 5.5 <[email protected]>
Aryan Sharma