Commit Graph
8 Commits
Author SHA1 Message Date
XairRrR 664a5c93e8 docs(hw-oracle): build the oracle under XDG_CACHE_HOME when it is set
HW_ORACLE.md said the first run builds oracle.c into
~/.cache/anyps5-hw-oracle/. hw_oracle.py takes the cache root from
XDG_CACHE_HOME and falls back to ~/.cache only when that variable is unset
or empty, so with XDG_CACHE_HOME=/tmp/xdg the binary is built under
/tmp/xdg/anyps5-hw-oracle/ and nothing appears in ~/.cache. The document
now names XDG_CACHE_HOME, the ~/.cache fallback, and HW_ORACLE_CACHE as
the override of both.

AI-assisted: yes
2026-10-29 05:51:05 +01:00
dantdmdarealguy c1becdf505 docs(hw-oracle): give the full path of the execution tests
The measured rows go into core/libs/prx/libSceAgcDriver/tests/execution/,
the only tests/execution directory in the tree; the guide named only
tests/execution/.
2026-10-28 13:38:21 -05:00
MarcZX10 b04ac8eca0 docs: list every runtime DLL the hardware oracle loads
oracle_hip.py tries amdhip64_7, amdhip64_6 and amdhip64, and amd_comgr_3,
amd_comgr_2 and amd_comgr, newest first; the guide named only the older
ones.
2026-10-27 20:26:06 +00:00
MarcusandClaude Opus 5.5 9e3cac0d89 feat(hw-oracle): run on Windows through the AMD driver's HIP runtime and comgr
tools/hw-oracle needed Linux with ROCm, so Windows measurements went
through private runners. oracle_hip.py assembles and links template.s
kernels with the driver's amd_comgr and dispatches them with its HIP
runtime, with the same rows, padding, dispatch splitting and report as
oracle.c. hw_oracle.py selects it with HW_ORACLE_RUNTIME, by default on
Windows, and loads it in-process so the DLLs are loaded once per run.

The driver's comgr 2.9 numbers its assemble and link actions 0x8 and
0x7, not 0xA and 0x9, so each step tries both and keeps the one that
returns exactly one output of the expected kind.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-21 11:07:06 -04:00
aleandClaude Fable 5.1 0bea402a1c feat(shader): follow FP16_OVFL in every f16 result
With FP16_OVFL=1 the hardware writes an f16 result that would round to
infinity as the largest finite value of that sign, unless a source
operand is infinite. v_div_fixup_f16 keeps the infinity it writes for a
zero denominator or an infinite numerator. Measured on RDNA2 (gfx1036)
at IEEE=0 and IEEE=1 with f16 denormals kept and flushed.

Co-Authored-By: Claude Fable 5.1 <[email protected]>
2026-10-10 04:32:38 -03:00
aleandClaude Fable 5.1 8d30c27589 feat(hw-oracle): make the group segment size an option
The template allocated a fixed 4 KiB of LDS, so kernels with immediate
offsets past it could not run. --lds (Python lds) sets the group segment
size in bytes, up to 64 KiB, with 4096 as the default.

Co-Authored-By: Claude Fable 5.1 <[email protected]>
2026-10-09 12:47:59 -03:00
Muhammad Umair f2b6b5a1a9 fix(oracle)!: require explicit float modes
BREAKING CHANGE: CLI and Python callers must supply all seven float
controls. Add clamp, rounding and FP16 overflow settings so hardware
measurements cannot silently use an unintended mode.

Refs #981
2026-10-07 14:58:28 +05:00
Adrià FranchandClaude f617b40a45 feat(tools): add a hardware oracle for RDNA instruction semantics
Co-Authored-By: Claude <[email protected]>
2026-10-06 13:54:28 +02:00