Commit Graph
1993 Commits
Author SHA1 Message Date
Dean b82cc96894 Merge pull request #8886 from thuanquang/fix/dot2-f32-f16-accumulator-modifiers
fix(shader): apply v_dot2_f32_f16's accumulator modifiers as RDNA 2 does
2026-10-26 11:06:40 +13:00
Adrià 3a930342d5 Merge pull request #9701 from frankea/fix/structurizer-scc-iterative
fix(shader): find strongly connected components without recursion
2026-10-25 23:03:07 +01:00
Dean 97c2c0eed8 Merge pull request #9251 from SandstromPL/fix/mimg-gather4-c-a
feat(shader): decode MIMG opcodes 0xc8 and 0xd8 as image_gather4_c_a and image_gather4_c_o_a
2026-10-26 05:42:57 +13:00
Adrià 66e6772ca2 Merge pull request #10473 from milescoviello/fix/release-unused-specialized-modules
fix(shader): release specialized modules that no result uses
2026-10-25 11:58:42 +01:00
Adrià e317f41d59 Merge pull request #10440 from SuarezPM/ai/atomic64-keyed-tables
feat(shader): support 64-bit image atomics through keyed image tables
2026-10-25 11:58:35 +01:00
Dean b91a6a60c5 Merge pull request #10595 from TechLevelZero/fix/f32-conversion-denormal-modes
fix(shader): translate f32 conversions in f32 denormal modes 1 and 2
2026-10-25 23:54:07 +13:00
Adrià 75227c7cdc Merge pull request #10423 from meh7an/perf/shader-masked-result-memo
perf(shader): reuse a memoized result by patching its copied words
2026-10-25 11:50:14 +01:00
Dean 6f155e8b56 Merge pull request #10639 from Galluno/perf/shader-cache-version-realpath
fix(shader): resolve each shader cache source and include path once
2026-10-25 21:37:25 +13:00
Adrià c8d34aa8f4 Merge pull request #6009 from zmeizy/claude/minmax-f32-denormal-modes
fix(shader): translate f32 min and max in f32 denormal modes 1 and 2
2026-10-24 22:13:03 +02:00
Adrià befe264ffb Merge pull request #9495 from Neppolo/fix/spirv-optimizer-host-stack
fix(shader): validate and optimize SPIR-V on a host thread when the stack is short
2026-10-24 20:14:59 +02:00
Adrià d0e7fe7beb Merge pull request #5941 from zmeizy/claude/mullit-f32-denormal-modes
fix(shader): translate v_mullit_f32 in f32 denormal modes 1 and 2
2026-10-24 19:36:11 +02:00
Adrià 66de8e7a12 Merge pull request #9177 from milescoviello/perf/draw-allocations
perf(agc): drop three per-draw allocations on the draw and materialize paths
2026-10-24 18:29:19 +02:00
Adrià e7e99adcc4 Merge pull request #6010 from zmeizy/claude/add-mul-f32-denormal-modes
fix(shader): translate f32 add and multiply in f32 denormal modes 1 a…
2026-10-24 18:20:07 +02:00
TechLevelZeroandClaude Opus 5.5 753767f86a fix(shader): translate f32 conversions in f32 denormal modes 1 and 2
The f32 conversions that only flush their inputs follow bit 0 of the
FLOAT_MODE f32 denormal field, as the f32 compares do: mode 1 keeps
denormal inputs like mode 3 and mode 2 flushes them like mode 0.
v_cvt_pk_u8_f32 also follows a round mode set at run time.

Measured on RDNA2 (gfx1036) with the hardware oracle.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-24 16:23:33 +01:00
Nicola GalluccioandClaude Opus 5.5 50e383ca4a fix(shader): resolve each shader cache source and include path once
ShaderCacheVersion.cmake resolved every source's real path twice and
every include's real path once per include line: 1102 REALPATH calls
per run, about 1.6 ms each on Windows. Reuse the source paths from the
first pass and resolve each include path once. The generated version
file is unchanged.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-24 16:46:39 +02:00
Adrià c9b2660d56 Merge pull request #9567 from Izamaru/fix/rve-descriptor-references
fix(shader): refresh descriptor sources after redundant value elimination
2026-10-24 15:46:56 +02:00
Adrià 522e32e3b6 Merge pull request #7550 from gjonn/fix/shader-resinfo-any-descriptor-dimension
fix(shader): answer image_get_resinfo on any T# dimension
2026-10-24 15:30:15 +02:00
Adrià 18e85391b4 Merge pull request #9746 from imellag/fix/shader-empty-loop-continue
fix(shader): route a loop's back edge through an empty continue block when its latch holds instructions
2026-10-24 14:53:54 +02:00
Adrià 924b5628b3 Merge pull request #8632 from JJenkx/fix/srt-unsigned-bound-compare
fix(shader): decide an unsigned bound compare from its extreme operand
2026-10-24 11:56:35 +02:00
Adrià 893f1a067a Merge pull request #10496 from milescoviello/fix/share-identical-resource-plans
fix(shader): share resource plans loaded from the same disk cache payload
2026-10-24 11:54:07 +02:00
Adrià 4dac9d2eba Merge pull request #6657 from xQuakes/fix/shader-local-relative-index
fix(shader): accept a local tessellation index that nothing observes
2026-10-24 11:26:52 +02:00
Dean c077c7aaa1 Merge pull request #9907 from EagleBearerYS/fix/ir-dump-memory-offsets
fix(shader): print memory instructions' pc and offset in the IR dump
2026-10-24 22:11:05 +13:00
milescovielloandClaude Opus 5.5 0e1767b24b fix(shader): release specialized modules that no result uses
The specialized module caches (by variant and constants, by binding plan
and by registration key) and the SPIR-V interning table held every
module's words for the rest of the run, after the results that used them
were gone. They now keep a module's interface (bindings, push data,
specialization ID and content hash) and only a weak reference to its
words; a lookup after the words were released builds them again from the
same key, checks the content hash, and keeps the specialization ID that
names the module's pipelines. The interning table keeps weak references
and drops expired ones from the bucket it searches.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-24 10:22:05 +02:00
Dean 1e2d0e95f2 Merge pull request #10053 from klosixgaming-arch/fix/window-narrowing-switch-cap
fix(recompiler): skip window narrowing when it adds too many switches
2026-10-24 20:47:38 +13:00
Dean 34c97ca9d9 Merge pull request #9046 from mehmetbayoglu/fix/recompiler-cache-line-endings
fix(recompiler): hash shader cache sources with normalized line endings
2026-10-24 20:22:23 +13:00
Adrià FranchandClaude Sonnet 5.5 424b8f90b1 fix(shader): a negated predicate excludes only conditions that imply its operand
Co-Authored-By: Claude Sonnet 5.5 <[email protected]>
2026-10-24 08:40:33 +02:00
xQuakes 418db9d2f8 fix(shader): accept a local tessellation index that nothing observes
A local program that keeps the relative patch index only on inactive
lanes, or in a vector-window slot nothing reloads, was refused as a
data use. Follow the index through the values that carry it, and
refuse only when a side effect still observes it.
2026-10-24 08:40:33 +02:00
Adrià 8a85a5c848 Merge pull request #10438 from milescoviello/fix/cache-key-target-digest
fix(shader): key the device's capabilities and extensions by a digest
2026-10-24 08:08:52 +02:00
Adrià a5a2c946a3 Merge pull request #10396 from CrimsonMac/fix/lds-misaligned-atomic64-fault
fix(shader): fault on misaligned 64-bit LDS atomics under the workgroup lock
2026-10-24 07:33:30 +02:00
Dean 5752fc5875 Merge pull request #10232 from valenciana-nc/fix/vertex-descriptor-diagnostics
fix(agc): include descriptor words in vertex validation errors
2026-10-24 18:22:37 +13:00
milescovielloandClaude Opus 5.5 38ac888dbb fix(shader): share resource plans loaded from the same disk cache payload
A shader source loading its resource plan from the disk cache decoded
its own copy, also when another source had already loaded the same
plan: the same code registered under another plan key (another host
subgroup size or interface) stores byte-identical plan entries. In Ghost
of Tsushima's cache, 14,043 plan entries hold 8,170 distinct payloads.
Loaded plans now go through a table of weak references keyed by two
hashes of the payload, its size and the shader address the plan carries,
so equal payloads for one shader decode once and share the plan, its
compact form and its compiled SRT tape while any source uses it.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-24 04:23:05 +00:00
memob 776040e96d Merge remote-tracking branch 'origin/main' into fix/recompiler-cache-line-endings
# Conflicts:
#	core/shader/recompiler/ShaderCacheVersion.cmake
2026-10-24 00:02:21 -04:00
JJenkxandClaude Opus 5.5 9ed24c8b41 fix(shader): decide an unsigned bound compare from its extreme operand
A resource block behind v_cmpx_gt_u32 exec, s, v0 and s_cbranch_execz keeps
its condition only if the compare can decide it, but UGreaterThan32 and
ULessThan32 needed both operands and v0 is a lane value. When the uniform
operand is 0 (or 0xffffffff on the other side) no lane can pass the compare,
so the walk can skip the block without the lane value.

UGreaterThan32 now yields false when its first operand is 0 or its second is
0xffffffff, and ULessThan32 when its first is 0xffffffff or its second is 0,
in the SRT interpreter and in the SRT tape alike; MayDecide keeps such a
condition when either operand is evaluable. Fully evaluable compares are
unchanged.

Destruction AllStars (PPSA02630) dispatches compute shader 0x200a220000 with
a thread count of 0 and leaves the V# in the skipped block stale (one
dispatch holds 00000000 00000000 00000000 ffffffff), which stopped it at
about 40 s with "buffer descriptor uses an unsupported type".

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-23 23:59:32 -04:00
Dean 8422cc2014 Merge pull request #10023 from slopggobblercobbler81/fix/recompiler-cache-path-separators
fix(recompiler): normalize shader cache paths across platform separators
2026-10-24 16:54:51 +13:00
valenciana-nc 42424dd55e fix(agc): include descriptor words in vertex validation errors 2026-10-23 20:44:39 -06:00
Adrià FranchandClaude Opus 5.5 7b4b9d9814 fix(shader): zero the resinfo layer count for DIMs without layers
image_get_resinfo returns 0 in its third component when the instruction's
DIM has no layers (1D, 2D, 2D MSAA) and the T# is not 3D, as measured on
RDNA 2 in #7550. Keep 1D-array T#s on their first layer and MSAA T#s
refused, and record the unmeasured forms in the shader debt file.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-24 04:21:06 +02:00
Gjon Gojcevic 3ba1d39db6 fix(shader): answer image_get_resinfo on any T# dimension
image_get_resinfo with DIM 1D on a cube, 3D or 2D-array T# was refused
with "image address has too few coordinate components": the tracker made
a 1D image that only the query uses, and no 1D mode matches such a T#.
The returned size, layer count and levels come from the T#; DIM only sets
the number of address registers. A 1D image used only by dimension
queries now decodes the T#'s own dimension and accepts 2D, 1D array,
2D array, 3D and cube views.
The flag is stored in the shader disk cache, so FormatVersion moves to 38.

PPSA01317 queries a 64x64 cube with DIM 1D in a pixel shader.

AI-assisted: yes
2026-10-24 04:07:24 +02:00
Dean f45a8d2bdc Merge pull request #9274 from zmeizy/claude/f32-hardware-flush-float-mode
fix(shader): take the hardware f32 flush only in shaders that flush f32 denormals
2026-10-24 14:20:09 +13:00
Adrià 11d6efa06c Merge pull request #9305 from tibzejoker/fix/bit-exact-reciprocal
feat(shader): bit-exact RDNA v_rcp_f32 behind APS5_EXACT_RCP
2026-10-24 02:47:43 +02:00
Dean e2b9700a98 Merge pull request #7880 from klosixgaming-arch/fix/shader-indirect-column-phi-pointer
fix(shader): resolve table column pointers through Phi nodes
2026-10-24 13:22:58 +13:00
milescovielloandClaude Opus 5.5 d7d9747e7d fix(shader): key the device's capabilities and extensions by a digest
Every recompile cache key appended the target's capability list and
each SPIR-V extension name one byte per 64-bit word, so on a device that
enables a few dozen extensions most of every key was the same device
description: built and compared on every dispatch and draw, and kept in
every in-memory key and disk cache entry. The two lists now enter the key
as a 128-bit digest over the capabilities and the length and bytes of
each extension name, eight bytes per step.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-24 00:20:45 +00:00
SuarezPM 9c3ffcf5b0 feat(shader): support 64-bit image atomics through keyed image tables
Table T#s keyed at runtime feeding image_atomic64_* now lower to
OpAtomic* on the table Atomic64View instead of faulting, mirroring
the 32-bit path: gate, dedup identity, binding flags and view
selection. Packed formats and BY element counts still fault; hosts
need VK_FORMAT_FEATURE_STORAGE_IMAGE_ATOMIC_BIT for the view format.
2026-10-23 21:14:39 -03:00
Adrià 798c908fc4 Merge pull request #9068 from frankea/table-callee-range
fix(shader): link table callees that together exceed s_call_b64 range
2026-10-24 01:58:48 +02:00
Adrià 06596f3bdf Merge pull request #9017 from TheSovietWaffle/fix/recompiler-stencil-replay-exec-copy
fix(recompiler): accept EXEC copies in stencil replay masks
2026-10-24 01:23:52 +02:00
Adrià d48007d462 Merge pull request #8883 from EagleBearerYS/perf/shader-plan-retention
perf(shader): keep only what a resource plan's branch conditions can evaluate
2026-10-24 01:00:04 +02:00
Dean 2fcc60cf37 Merge pull request #5426 from Prophet069/codex/review-scratch-offsets-20261013
fix(shader): decode GFX10 scratch offsets as one dword
2026-10-24 11:57:41 +13:00
Mehran 54d7c780a5 perf(shader): reuse a memoized result by patching its copied words 2026-10-24 01:17:14 +03:00
Adrià e7f46f5c89 Merge pull request #8489 from wachi35676/fix/shader-amd-lds-fence-scope
fix(shader): widen LDS atomic fences to device scope on AMD's proprietary driver
2026-10-24 00:02:07 +02:00
Adrià 495b7c10ab Merge pull request #8792 from SuarezPM/ai/image-atomics-keyed-tables
feat(shader): support 32-bit image atomics through keyed image tables
2026-10-24 00:00:03 +02:00
Adrià dcd7e3a61e Merge pull request #8564 from JAB-dev/feat/agc-4-4-4-4-partial-writes
feat(agc): merge partial writes into 4_4_4_4 UNORM color targets
2026-10-23 23:23:11 +02:00