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Michael Krumland-DunningandClaude Opus 5.5
2295183c6c
Both threw "f32 denormal mode N is not implemented" whenever FLOAT_MODE kept only one side of the f32 denormals, so any LLVM-compiled f32 division in such a shader failed to translate. On RDNA2 (gfx1036) at round to nearest even, v_div_fixup_f32 follows bit 0 of the field, and v_div_scale_f32 flushes its inputs in mode 2 as in mode 0 and in mode 1 keeps them and flushes a denormal result, with the VCC of mode 3. The translation now matches all 2,304 measured rows in modes 1 and 2 at IEEE 0 and 1. Directed rounding still throws, as an underflowing v_div_fixup_f32 result rounds to the smallest denormal there. Division and F32DenormalFlush no longer require modes 1 and 2 to be refused; Division checks v_div_scale_f32 in them against its measured vectors instead. Co-Authored-By: Claude Opus 5.5 <[email protected]>