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fdfawef324andClaude Opus 5.5
8bca46fb06
A lane whose IDXEN load was skipped keeps the T# VGPRs it had before, and a waterfall that reaches it uses that value as its T#. The fold refused only a value that was itself a uniform descriptor or a table read, so a default T# copied into the VGPRs under EXEC, or merged by a phi, was accepted and those lanes read zeros. The skipped lanes' values are now followed through the masked selects and phis that all eight dwords share, and the fold is refused when an arm is a descriptor or a table read. Every lane of a per-lane table runs the access with its own record, and the runtime image mode picks the SPIR-V path per lane, so lanes of one quad whose records need different modes take different paths around an implicit-derivative sample or LOD query, where derivatives are undefined. Such a table now throws at dispatch; accesses of one table share the check, so they keep one table. The test also covers v_readfirstlane and v_cmpx_eq_u64 waterfalls and refuses loops that compare seven T# dwords, run the image instruction after EXEC is restored, or store. Co-Authored-By: Claude Opus 5.5 <[email protected]>