Celegans12 a0d4b45591 fix(shader): mask EXEC copies to the host subgroup's lanes ...

A wave64 graphics program on a 32-lane host runs one guest lane per
invocation, yet an EXEC written as a value keeps all 64 bits: the NGG
prologue's s_lshr_b64 exec, -1, 64 - count reads count 0 and sets -1.
A waterfall loop that copies EXEC with s_mov_b64 and retires one key
per pass then never empties its copy, since no ballot sets the lanes
the host lacks, and its v_readlane picks lane 32 and up.

readRawU32 now ANDs EXEC with a ballot of true when it is read as a
value (s_mov_b64, ALU sources, src_execz), and s_*_saveexec and
s_*_wrexec store that masked copy. EXEC's own words, threadBit and the
saveexec combination keep the raw words, so s_orn2_saveexec_b64 vcc,
exec still sets all 64 bits. On subgroups under 32 lanes the EXEC_LO
copies of agc_driver_scalar_sop1 now hold only the subgroup's lanes.

2026-10-07 22:11:59 +02:00

..

ARCHITECTURE.md

docs: add architecture overview with Mermaid diagrams

2026-10-04 11:20:38 +02:00

BUILD.md

test(agc): validate pixel LDS and expose pipeline statistics

2026-10-04 23:04:39 -03:00

CONVENTIONS.md

refactor(docs): separated user and dev in docs + compatibility file

2026-09-28 22:58:17 +03:00

HW_ORACLE.md

feat(tools): add a hardware oracle for RDNA instruction semantics

2026-10-06 13:54:28 +02:00

TechnicalDebt.md

fix(shader): mask EXEC copies to the host subgroup's lanes

2026-10-07 22:11:59 +02:00