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AlxcBTW
c05b2567be
A compute kernel that stores one colour to every texel of a storage image over a depth plane (a shadow atlas clear) copied the whole plane depth image -> staging buffer -> mirror before the dispatch and mirror -> staging buffer -> depth image after it, although the kernel reads nothing and writes every texel. A dispatch of the 15-word 8x8x1 image clear kernel (direct, no partial last group) whose T# lies on a depth surface now reads its colour from guest memory under the GPU mutex, the place the kernel reads it. When the dispatch covers the whole plane, the plane is one layer of level 0, the colour is a value the plane's format holds exactly (0 or 1 for a 16-bit unorm view, 0 or 0xffff for a 16-bit uint view, 0 or a normal float in (0, 1] for a 32-bit view) and nothing is waiting to write the colour, the dispatch still writes the mirror but the copy-in is left out, and the copy-out becomes a clear of the depth image to that value. The colour is read again when the copy-out is replaced; a changed value keeps the copy-out. Every other dispatch, stencil planes and declined values keep both copies. agc_driver_depth_clear_hle_tests runs the clear sequences with the clear taken and with the copies, and compares the depth image texel by texel through the mirror, the guest memory and the depth tests.