raghav314andClaude Opus 5.5 f5a6a31b61 fix(agc): read unwritten user data registers as zero ...

A stage's user data registers are read for the count in its RSRC2
(COMPUTE_PGM_RSRC2 for compute). A register the title never wrote no
longer refuses the draw or dispatch: it reads 0, as Kyty and SharpEmu
read it and as AMD PAL and Mesa initialize the user data registers.

Co-Authored-By: Claude Opus 5.5 <[email protected]>

2026-10-07 08:09:54 +05:30

..

BUILD.md

test(agc): validate pixel LDS and expose pipeline statistics

2026-10-04 23:04:39 -03:00

CONVENTIONS.md

refactor(docs): separated user and dev in docs + compatibility file

2026-09-28 22:58:17 +03:00

HW_ORACLE.md

feat(tools): add a hardware oracle for RDNA instruction semantics

2026-10-06 13:54:28 +02:00

TechnicalDebt.md

fix(agc): read unwritten user data registers as zero

2026-10-07 08:09:54 +05:30