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The masked case loaded EXEC from a scalar literal. A scalar mask is read by subgroup lane, so on a host whose subgroups are narrower than the wave (llvmpipe: 8 lanes) lane 16 took bit 0 and stayed active. v_cmpx_gt_u32 on the thread id gives the same low 16 lanes on any subgroup size. Co-Authored-By: Claude Opus 5.5 <[email protected]>