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fdfawef324andClaude Opus 5.5
15955c089e
A draw with PA_SC_AA_CONFIG.MSAA_NUM_SAMPLES > 0 whose context never wrote PA_SC_AA_SAMPLE_LOCS_PIXEL_* (context 0x2fe-0x30d) was rejected with "missing register in context bank at DWORD 0x2fe", because the registers were absent from the initial context (PPSA07411 stops on it after two frames). The MSAA_ENABLE single-sample path read them the same way. The sixteen registers now start at 0, both initially and after CLEAR_STATE. That is the value in libSceAgc's own register defaults (sceAgcGetRegisterDefaults2, every public table that holds context registers, the tables the initial context already follows for PA_SU_VTX_CNTL and PA_SC_CONSERVATIVE_RASTERIZATION_CNTL), in amdgpu's GFX10 clear-state table (clearstate_gfx10.h, gfx10_SECT_CONTEXT_def_8, loaded by gfx_v10_0_cp_gfx_start before CLEAR_STATE) and the GC 10.3 register reset value (gc_10_3_0_default.h). RADV, radeonsi and PAL always write the locations themselves and do not settle the unwritten value. 0 puts every sample at the pixel center. That is not the standard pattern for any sample count, so such a draw decodes as custom locations at the center, as a single-sample scan into a multisampled target already does. Co-Authored-By: Claude Opus 5.5 <[email protected]>