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test(agc): name the host stage in the unit shadow tests' host-write barriers
The retile and key-store helpers order the host's pattern writes before their transfer with VK_ACCESS_HOST_WRITE_BIT under VK_PIPELINE_STAGE_ALL_COMMANDS_BIT alone, which does not include the host stage (VUID-vkCmdPipelineBarrier-srcAccessMask-02815). They now name VK_PIPELINE_STAGE_HOST_BIT as UnitShadow.cpp does for the same barrier.
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@@ -4023,7 +4023,7 @@ bool unitShadowTests(const Device& device, Recorder& recorder) {
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const auto commands = recorder.Commands();
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recorder.Keep(pattern);
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recorder.Keep(destination.slab);
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RecordMemoryBarrier(context, commands, VK_PIPELINE_STAGE_ALL_COMMANDS_BIT, VK_PIPELINE_STAGE_TRANSFER_BIT, VK_ACCESS_HOST_WRITE_BIT | VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_TRANSFER_READ_BIT | VK_ACCESS_TRANSFER_WRITE_BIT);
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RecordMemoryBarrier(context, commands, VK_PIPELINE_STAGE_ALL_COMMANDS_BIT | VK_PIPELINE_STAGE_HOST_BIT, VK_PIPELINE_STAGE_TRANSFER_BIT, VK_ACCESS_HOST_WRITE_BIT | VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_TRANSFER_READ_BIT | VK_ACCESS_TRANSFER_WRITE_BIT);
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if (seed) {
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const VkBufferCopy seedCopy{begin - import->base, SlabOffset(*import, *destination.slab, begin), unit};
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copyBuffer(commands, import->buffer, destination.buffer, 1, &seedCopy);
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@@ -6469,7 +6469,7 @@ bool shadowedKeyStoreTests(const Device& device, Recorder& recorder) {
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const auto commands = recorder.Commands();
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recorder.Keep(pattern);
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recorder.Keep(destination->slab);
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RecordMemoryBarrier(context, commands, VK_PIPELINE_STAGE_ALL_COMMANDS_BIT, VK_PIPELINE_STAGE_TRANSFER_BIT, VK_ACCESS_HOST_WRITE_BIT | VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_TRANSFER_READ_BIT | VK_ACCESS_TRANSFER_WRITE_BIT);
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RecordMemoryBarrier(context, commands, VK_PIPELINE_STAGE_ALL_COMMANDS_BIT | VK_PIPELINE_STAGE_HOST_BIT, VK_PIPELINE_STAGE_TRANSFER_BIT, VK_ACCESS_HOST_WRITE_BIT | VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_TRANSFER_READ_BIT | VK_ACCESS_TRANSFER_WRITE_BIT);
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const VkBufferCopy piece{0, destination->offset, unit};
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copyBuffer(commands, pattern->Handle(), destination->buffer, 1, &piece);
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RecordMemoryBarrier(context, commands, VK_PIPELINE_STAGE_TRANSFER_BIT, VK_PIPELINE_STAGE_ALL_COMMANDS_BIT, VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_TRANSFER_READ_BIT | VK_ACCESS_TRANSFER_WRITE_BIT);
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