Commit Graph
5577 Commits
Author SHA1 Message Date
john.maiaandClaude Opus 5.5 f5293b64d2 feat(libSceVideodec2): decode HEVC and VP9
EVO-PLAYER (PPSA99039) creates resident AVC, HEVC and VP9 decoders at
start-up, and stopped at "Videodec2: unsupported codec" on the HEVC one.
Codec types 974921 (HEVC) and 2382845 (VP9) now open FFmpeg's HEVC and
VP9 decoders. HEVC input goes through the same Annex B conversion as
H.264 and VP9 frames are passed through; output stays 8-bit NV12, and a
frame deeper than 8 bits throws. Picture info throws for HEVC and VP9,
whose layouts differ from the AVC one.

Assisted by Claude Code.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
Claude-Session: https://claude.ai/code/session_01DwFnKjMxmwGDWiuYYf1v4D
2026-10-09 01:27:15 +01:00
Joey Fisher def0be1085 fix(agc): prepare a rect-list draw's missing rectangle at draw from its prepared stages 2026-10-08 18:06:04 -06:00
Joey Fisher a2dc28aa6a refactor(agc): look up a rect-list draw's rectangle through DrawRectangle 2026-10-08 18:01:42 -06:00
Scott SchusterandClaude Opus 5.5 88cc2ea477 fix(agc): accept RADV's disabled conservative rasterization state
With conservative rasterization disabled, RADV programs
PA_SC_CONSERVATIVE_RASTERIZATION_CNTL to NULL_SQUAD_AA_MASK_ENABLE alone,
where libSceAgc writes the two INNER_TO_NORMAL overrides (0x6000). A value
made of only those bits now decodes as disabled; overestimation (0x6001) keeps
its checks, and every other mode is still rejected.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-08 18:24:47 -05:00
Scott SchusterandClaude Opus 5.5 6c5b181b68 fix(agc): accept PA_SC_MODE_CNTL_1's out-of-order watermark
RADV sets OUT_OF_ORDER_WATER_MARK to 7 on every GFX10 draw, also when
OUT_OF_ORDER_PRIMITIVE_ENABLE is off. The watermark only tunes out-of-order
rasterization, which stays rejected, so the field is accepted alone.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-08 18:24:47 -05:00
Scott SchusterandClaude Opus 5.5 1e20b4ec50 feat(agc): blend against an opaque destination for CB_COLOR_ATTRIB FORCE_DST_ALPHA_1
FORCE_DST_ALPHA_1 makes blending read a target's destination alpha as 1, as
for an RGBX surface; RADV sets it for formats without alpha. The target's
blend factors are rewritten to what they become with Ad = 1: DST_ALPHA is
ONE and ONE_MINUS_DST_ALPHA is ZERO, SRC_ALPHA_SATURATE is ZERO in the color
equation, and DST_COLOR and ONE_MINUS_DST_COLOR are ONE and ZERO in the
alpha equation. Other CB_COLOR_ATTRIB bits stay rejected.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-08 18:24:46 -05:00
Scott SchusterandClaude Opus 5.5 4bc84d6b44 fix(relinker): convert stack-guard and thread-pointer reads with an empty PT_TLS
A title built with -fstack-protector reads its guard from fs:0x28 even when
it has no thread-local data and its linker emits an empty PT_TLS. The
Windows TLS builder refused any guest TLS access in that case. The guard and
the thread pointer live in the thread control block, which the builder
already emits, so an empty PT_TLS now takes the normal path, where a
zero-sized TLS block still rejects every other displacement.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-08 18:08:06 -05:00
Scott SchusterandClaude Opus 5.5 7c8dae0b33 fix(pad): accept the compatible vibration mode
scePadSetVibrationMode rejected mode 2 (compatible, per SharpProspero's
ScePadVibrationMode). The PS5 SDL joystick driver requests it on every
open and closes the pad when it fails, so SDL titles lost their controller.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-08 18:08:05 -05:00
Joey Fisher 1f0060d72d fix(shader): saturate VOP3 v_add/sub_nc_u32 and 16-bit add/sub on clamp 2026-10-08 16:55:06 -06:00
Joey Fisher 485387ef2f test(shader): pin VOP3 integer add/sub clamp results measured on RDNA2 2026-10-08 16:55:06 -06:00
Adrià f145139676 Merge pull request #1878 from adriadam10/fix/shader-fma-mix-fused
fix(shader): translate v_fma_mix_f32 as a fused multiply-add
2026-10-09 00:46:52 +02:00
Adrià 42e9148636 Merge pull request #1867 from adriadam10/fix/shader-unary-nan-ieee
fix(shader): quiet signaling NaNs only in IEEE mode
2026-10-09 00:42:27 +02:00
Adrià FranchandClaude 6833b0ed55 fix(shader): translate v_fma_mix_f32 as a fused multiply-add
Co-Authored-By: Claude <[email protected]>
2026-10-09 00:40:13 +02:00
Adrià db1391dc5a Merge pull request #1863 from adriadam10/fix/libc-arena-reserve-race
fix(libc): retry the guest arena reservation when the range was mapped meanwhile
2026-10-09 00:40:13 +02:00
Adrià FranchandClaude ef4dca9a54 fix(shader): quiet signaling NaNs only in IEEE mode
Co-Authored-By: Claude <[email protected]>
2026-10-09 00:33:02 +02:00
krishnarayaandClaude Opus 5.5 17f1a2e59a test(agc): pin the 64-bit atomics emission failures
Co-Authored-By: Claude Opus 5.5 (1M context) <[email protected]>
2026-10-08 18:28:50 -04:00
krishnarayaandClaude Opus 5.5 e5da5fd2a3 fix(agc): lay out 3D SW_64KB_D_X textures as thick volumes
Co-Authored-By: Claude Opus 5.5 (1M context) <[email protected]>
2026-10-08 18:28:19 -04:00
krishnarayaandClaude Opus 5.5 b719eedaa5 fix(agc): round linear volume mip extents up as addrlib does
Co-Authored-By: Claude Opus 5.5 (1M context) <[email protected]>
2026-10-08 18:28:18 -04:00
krishnarayaandClaude Opus 5.5 96569aac30 fix(shader): refuse the MUBUF lds modifier instead of decoding a VGPR load
Co-Authored-By: Claude Opus 5.5 (1M context) <[email protected]>
2026-10-08 18:28:16 -04:00
Adrià FranchandClaude f04ce007b6 feat(shader): follow DX10_CLAMP in the clamp modifier
Co-Authored-By: Claude <[email protected]>
2026-10-09 00:25:07 +02:00
Adrià ce64d8eb36 Merge pull request #1850 from adriadam10/feat/shader-f32-denormal-flush
feat(shader): flush f32 denormals in the float modes that flush them
2026-10-09 00:24:54 +02:00
Adrià FranchandClaude b9fa0c941d fix(libc): retry the guest arena reservation when the range was mapped meanwhile
Co-Authored-By: Claude <[email protected]>
2026-10-09 00:22:52 +02:00
Celegans12 d3a66dbbbe feat(agc): implement deferred faults for descriptors read through null SRT pointers
Capturing a shader evaluates every V#, T# and S# the program uses,
including those behind a branch the wave does not take. When such a
descriptor was loaded through a pointer read from memory that is null
or unmapped, the capture threw "guest memory is not readable", while
the console faults only if a wave executes that s_load. The descriptor
now reads as zero words, and the flat SRT walk records the s_load's
dwords as it does for flat reads, so their guarded ReadConst raises
the BDA fault where the wave runs the s_load. A zero V# is an absent
buffer and a zero T# binds a null descriptor, as for any zero word
read from memory, so nothing new enters a key. A zeroed descriptor
whose read no flat slot records still throws, as do branch conditions,
uniform fills, table bases and user-data pointers.
2026-10-09 00:21:00 +02:00
Celegans12 56f8a62428 feat(agc): implement deferred faults for reads through null SRT pointers
Capturing a shader threw "null or misaligned address" when the flat
SRT walk read through a pointer loaded from memory that is null or
unmapped, even when the program skips that s_load. Such a read now
yields zero and a record with its pc and address, as does a slot whose
address needs it. The registered artifact checks one flag word per
guarded slot at each ReadConst; the capture appends the flags and the
records to the flattened SRT, and a set flag raises an Unmapped BDA
fault through the fault buffer and stops the invocation as a BDA read
does. Nothing per capture enters a key: poisoned and clean captures
share one variant and specialization. Descriptors, branch conditions,
uniform fills, table bases and user-data pointers that need such a
value still throw, and poisoned results stay out of the dispatch and
draw caches. The shader disk cache format becomes 21.
2026-10-09 00:20:59 +02:00
overlordxrz-source 8f09ec3616 feat(libkernel): implement system 2026-10-08 18:15:49 -04:00
Adrià FranchandClaude f132f16155 feat(shader): flush f32 denormals in the float modes that flush them
Co-Authored-By: Claude <[email protected]>
2026-10-08 23:59:24 +02:00
LeandroLP23andClaude Opus 5.5 f054374661 test(libSceNet): pin the resolver info layout and check the buffer on errors
The layout offsets the titles read are static_asserts, and guest_sce_net now
checks a canary past byte 384, distinct records, and an untouched buffer on the
EINVAL, RESOLVER_ENODNS and EBADF paths, as #1845's test did.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-08 23:58:18 +02:00
Adrià FranchandClaude d3f2611384 fix(shader): apply the output modifier only in the float modes where the hardware does
Co-Authored-By: Claude <[email protected]>
2026-10-08 23:58:08 +02:00
Adrià ae91d9780b Merge pull request #697 from queeeef/feat/interp-f16
feat(shader): implement v_interp_p1ll_f16, v_interp_p1lv_f16 and v_interp_p2_f16
2026-10-08 23:56:17 +02:00
LeandroLP23andClaude Opus 5.5 427fd92591 feat(libSceNet): implement sceNetResolverStartNtoaMultipleRecordsEx
PS5VR (PPSA99177) stops at start-up on the unresolved import sT4nBQKUPqM;
Jelly5, Emby5 and Nuvio import it too. The call fills the 384-byte resolver
info with up to ten IPv4 records (32 bytes each, family at +16) and the record
counts at +320 and +324, from the same host lookup sceNetResolverStartNtoa
uses, now shared. Only flags 0 is implemented; other flags throw.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-08 23:52:02 +02:00
LeandroLP23andClaude Opus 5.5 7449e51483 feat(libc): implement __inet_aton
PICO-8 for PS5 (PPSA99808) stops at start-up on the unresolved import
a7ToDPsIQrc from libSceLibcInternal. The parser follows FreeBSD's inet_aton
(lib/libc/inet/inet_addr.c): one to four parts in decimal, octal or hex, the
last part filling the remaining bytes, input ending at a NUL or whitespace,
and a null address only validating.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-08 23:48:48 +02:00
Gerard L.andClaude Opus 5.5 1d6968225f test(agc): run agc_driver_mesh_tests under ctest
The mesh test was built only on request and never registered, so the
translation of NGG geometry programs to mesh shaders ran in no test
run. On an RTX 4060 it passes. Register it with the other AGC driver
tests.

Three cases would fail or mislead under ctest. Without a Vulkan device
the test failed, and the Windows job has none. A device without
VK_EXT_mesh_shader exited 0, so ctest reported a pass for a test that
drew nothing. On llvmpipe, with the Linux job's Mesa 25.2.8 and Ubuntu
24.04's LLVM 20.1.2, every draw that builds a mesh pipeline stops the
process with "LLVM ERROR: Cannot emit physreg copy instruction"; Mesa
26.2.4 with LLVM 23.1 segfaults in LLVM's code generation instead. The
SPIR-V of all 18 modules the test builds passes spirv-val. Mesa #14376
reports the same error for lavapipe mesh shaders that index shared
memory per invocation; that the cause is the same is not established.

The test now opens its device with OpenVulkanTestDevice and exits 77
without a device, without VK_EXT_mesh_shader and on llvmpipe, saying
why. ANYPS5_REQUIRE_VULKAN still turns a missing device into a
failure. The Linux job therefore skips the test; it runs on hosts with
a GPU.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-08 23:44:46 +02:00
Joey Fisher 24623021cd fix(ajm): decode multichannel ATRAC9 streams
Config 0x30 (the ambisonic layout, 4 to 16 channels) was rejected at instance init, so Demon's Souls asserted in
its audio player and crashed entering the tutorial level. Each channel is decoded as a mono stream and the
blocks are interleaved.
2026-10-08 15:44:01 -06:00
Adrià 94b1eecb59 Merge pull request #533 from adriadam10/test/vop3p-packed
fix(shader): choose packed f16 NaN results on the bits, as RDNA does
2026-10-08 23:41:34 +02:00
sarohyandClaude Opus 4.8 f765b27cc0 test(relinker): cover CLI argument parsing
Cli::ParseArgs had no test coverage: its only sibling test
(AutorunExitTests) exercises the autorun launcher, not the parser.

Add cli_args_tests covering every option and its side effects, the
--rpath and --exclude-sce-module value consumption (including that the
following token is taken verbatim rather than re-parsed as a flag), the
unused-filter value and single-specification validation, the
--exclude-sce-module/--skip-sce-module conflict in both orders, the
order-independent --windows-diagnostics/--windows-gui requirement on
--windows, unknown-option and extra-positional rejection, and the usage
message when an input or output path is missing.

Co-Authored-By: Claude Opus 4.8 (1M context) <[email protected]>
2026-10-09 02:40:19 +05:00
Adrià dc79e9b1d6 Merge pull request #938 from CnRJay/feat/ds-src2-b32
feat(shader): implement the 32-bit DS src2 operations
2026-10-08 23:36:33 +02:00
Nahuel Genchi 81d86aa523 fix(libc): call the new handler when operator new fails to allocate 2026-10-08 18:36:31 -03:00
Adrià FranchandClaude 8f663d0123 feat(shader): follow the float mode in 16-bit interpolation
Co-Authored-By: Claude <[email protected]>
2026-10-08 23:36:04 +02:00
Daan DehingandClaude Opus 5.5 425836e73f fix(shader): give 16-bit interpolation NaNs the hardware priority
Measured on RDNA2 in #697: an invalid product or sum (inf * 0, inf - inf)
gives the negative default NaN, 0xffc00000 or 0xfe00, and beats a NaN
addend. A NaN delta, then a NaN coordinate, still wins, quieted; a NaN
addend is returned quieted only when the product is valid.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-08 23:36:04 +02:00
Daan DehingandClaude Opus 5.5 7f53a48131 fix(shader): round each 16-bit interpolation step once, as on hardware
Measured on RDNA2 in #697: v_interp_p1ll_f16 and v_interp_p1lv_f16 are a
fused multiply-add rounded once to f32, and v_interp_p2_f16 rounds the exact
P20 * J + S2 once to f16. The separate multiply and add matched about 85% and
4% of the measured rows.

Both steps now use FPInterpolateF32 and FPInterpolateF16: the f16 delta times
the f32 coordinate is exact in f64, the sum is rounded to odd and then once to
nearest even at the target precision, so no driver can split or reround it.
Infinite and NaN operands take the unbounded f64 result.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-08 23:36:04 +02:00
Daan DehingandClaude Opus 5.5 daa6bee7cf feat(shader): implement v_interp_p1ll_f16, v_interp_p1lv_f16 and v_interp_p2_f16
Decode the three VOP3 16-bit interpolation instructions (attribute, channel
and high-half select in the src0 field, the I/J VGPR in src1, P0 or the first
step's result in src2) and translate them with a new
GetInterpolationParameterF16 IR value. It reads the selected 16-bit half of
each vertex's parameter through VK_KHR_fragment_shader_barycentric, so P10 and
P20 are vertex differences rounded to f16; both steps are a multiply and an
add, as in the f32 forms.

An input in FP16_INTERP_MODE whose low half is defaulted is still declared at
its slot when its high half is read, and the high half takes its default from
USE_DEFAULT_ATTR1 and DEFAULT_VAL_ATTR1. Without barycentrics, on an input
without FP16_INTERP_MODE or on a pass-through input the instructions throw.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-08 23:36:04 +02:00
Adrià FranchandClaude a000305181 fix(shader): choose packed f16 NaN results on the bits, as RDNA does
Co-Authored-By: Claude <[email protected]>
2026-10-08 23:34:18 +02:00
Adrià aa258760dc Merge pull request #1826 from adriadam10/feat/shader-ieee-minmax
feat(shader): follow IEEE_MODE in f32 min, max, min3, max3 and med3
2026-10-08 23:33:59 +02:00
journaltraces e411282b80 feat(libc): implement stpcpy
PICO-8 for PS5 (PPSA99808) imports stpcpy from libSceLibcInternal, one
of the absent imports #1578 lists for it. POSIX defines it as strcpy
that returns a pointer to the terminating null of the copy.
2026-10-09 00:22:57 +03:00
journaltraces 668a1e6f72 feat(libc): implement ldiv
RetroArch (PPSA99169) imports ldiv from libSceLibcInternal, one of the
absent imports #1578 lists for it. The guest long is 64-bit, so the
export takes std::int64_t and returns lldiv_t, which has the guest
ldiv_t layout; std::ldiv would truncate on Windows, where long is 32-bit.
2026-10-09 00:22:57 +03:00
ps54allandClaude Sonnet 5.5 1bd0ef8c96 refactor(libkernel): share one rename implementation with libc
The repo allows one implementation per export. Move libc's rename into
libc/src/Rename.cpp, compile that file into both libc and libkernel, and
drop the second copy from libkernel's Stdio.cpp. FilesystemError moves to a
header so the shared source can use it.

The test now checks that the symbol it resolves belongs to libkernel (module
handle on Windows, dladdr on Linux) so it fails when the export is removed.

Co-Authored-By: Claude Sonnet 5.5 <[email protected]>
2026-10-08 23:17:04 +02:00
ps54allandClaude Sonnet 5.5 1f580c8dde test(libkernel): use a relative directory in the rename test
The guest VFS on Linux does not map absolute host paths, so the test failed
at the first rename there. Match GuestFilesystem.cpp and build the directory
relative to the working directory.

Co-Authored-By: Claude Sonnet 5.5 <[email protected]>
2026-10-08 23:17:04 +02:00
ps54allandClaude Sonnet 5.5 372e2d4267 test(libkernel): cover the libkernel rename export directly
guest_filesystem_tests links libkernel and libc, both of which define
rename_nid_postfix, so which one it binds to depends on the loader and the
suite passes either way. Resolve the symbol from libkernel.prx explicitly so
the export added for titles that ship their own libc.prx is actually tested.

Co-Authored-By: Claude Sonnet 5.5 <[email protected]>
2026-10-08 23:17:03 +02:00
ps54allandClaude Opus 5.5 fc457760a8 feat(libkernel): export the POSIX rename
Titles that ship their own libc in sce_module import rename from
libkernel (NID NN01qLRhiqU), where it was missing, so PPSA12544 failed
to start. It checks both paths like unlink and maps sceKernelRename's
result to errno.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
2026-10-08 23:17:03 +02:00
Adrià 364a56b681 Merge pull request #1816 from adriadam10/feat/shader-float-mode-carry
feat(shader): carry the shader float mode into the recompile request
2026-10-08 23:16:04 +02:00